The present invention relates to communication networks, and more particularly to monitoring the link errors in communication networks.
A communication network includes a number of stations connected by communication links. The errors on a link are monitored so as to take a corrective action when needed. For example, in some Fiber Distributed Data Interface (FDDI) networks, a link is taken out of the network when the link error rate exceeds a predetermined threshold.
In particular, in some FDDI networks, link errors are detected by the physical layer of a station that receives data on the link. When a link error is detected, the physical layer generates an interrupt to a microprocessor controlling the SMT (Station Management) layer. The interrupts allow the microprocessor to keep track of the link errors. On each such interrupt, the microprocessor recomputes the link error rate and compares it to the threshold. If the link error rate exceeds the threshold, the microprocessor reconfigures the network to take the link out.
In high speed transmission networks, a station receives many bits per second (125 Mbits/second in the FDDI network). Hence, if even a small proportion of the received bits is erroneous, computing the link error rate and comparing it to a threshold may take a significant amount of the microprocessor time. The microprocessor becomes detracted from other tasks such as controlling the station MAC layer (MAC stands for Media Access Control) and other layers. It is therefore desirable to make link error monitoring more efficient so as to place less burden on the microprocessor.